Towards Robust Thermal MEMS: Demonstration of a Novel Approach for Solid Thermal Isolation by Substrate-Level Integrated Porous Microstructures

Most current thermal MEMS use fragile structures such as thin-film membranes or microcantilevers for thermal isolation. To increase the robustness of these devices, solid thermal insulators that are compatible with MEMS cleanroom processing are needed. This work introduces a novel approach for microscale thermal isolation using porous microstructures created with the recently developed PowderMEMS wafer-level process. MEMS devices consisting of heaters on a thin-film membrane were modified with porous microstructures made from three different materials. A thermal model for the estimation of the resulting thermal conductivity was developed, and measurements for porous structures in ambient air and under vacuum were performed. The PowderMEMS process was successfully used to create microscale thermal insulators in silicon cavities at the wafer level. Measurements indicate thermal conductivities of close to 0.1 W/mK in ambient air and close to 0.04 W/mK for porous structures under vacuum for the best-performing material. The obtained thermal conductivities are lower than those reported for both glass and porous silicon, making PowderMEMS a very interesting alternative for solid microscale thermal isolation.


Introduction
Thermal MEMS rely on the generation and/or absorption of heat at the microscale. Following simple resistive heaters, the three main classes of thermal MEMS are sensors, actuators, and energy harvesters. In the field of sensors, applications span from the detection of infrared radiation (IR) to calorimetric flow sensors, thermal accelerometers, and a variety of different gas-sensing principles [1][2][3][4][5][6]. Thermal actuators rely on the controlled deformation of a MEMS structure upon heating and cooling of defined areas. The main applications are as micromechanical switches and as tilt-actuators for micromirrors [7,8]. Thermal MEMS energy harvesters exploit the thermoelectric or pyroelectric effect to generate electrical energy from temperature gradients to power low-energy devices such as wearable sensors or implants [9].
Most thermal MEMS require the confinement of heat generation or absorption in a welldefined area to function. This necessitates the use of thermal isolation strategies that are, however, not trivial to implement due to the high thermal conductivity of monocrystalline silicon. The most common approach is to remove as much silicon as possible around the thermally active microstructure, which is mostly a metal thin-film. This can be achieved by creating thin-film membranes, suspension by microcantilevers, or the complete removal of any substrate leaving only the free-standing metallization [10]. All these approaches have the drawback that they create fragile structures with MEMS processes that are often difficult to control, as film stresses need to be carefully adjusted to prevent buckling or outright failure of the structures. Furthermore, suspended microstructures and thin and thin membranes are sensitive to damage by vibration or pressure shocks, limiting their use in rough environments.
The previously mentioned challenges have led MEMS designers to consider the use of thermally isolating bulk materials. The two main materials are glass and porous silicon. Both materials offer thermal conductivities that are more than two orders of magnitude lower than that of monocrystalline silicon [11][12][13]. Although suitable for some applications, these values are still much larger than the thermal conductivities that can be achieved with structures such as thin-film membranes or cantilevers [14,15].
Recently, PowderMEMS, a novel back-end-of-line (BEOL) compatible process for the creation of porous microstructures at the wafer level, has been described [16]. In brief, the process begins with the introduction of a dry loose powder into microcavities formed by, e.g., deep reactive ion etching (DRIE) [17]. Atomic layer deposition (ALD) is then used to agglomerate the loose powder in situ. Finally, the wafers are cleaned of any unwanted powder residues and are ready for further processing under standard MEMS cleanroom conditions. In previous work, the use of PowderMEMS structures for energy harvesting and zero-powder wakeup [18,19], permanent micromagnets and magnetic position detection [20,21], and the creation of liquid-cooled microscale inductor cores [22] has been presented.
In this work, a novel approach for the thermal isolation of MEMS components based on PowderMEMS microstructures is presented. The process was used to create porous structures at the wafer level inside microcavities beneath thin-film membranes with embedded heaters. A thermal model was developed to estimate the resulting thermal conductivities of the structures. Since the thermal conductivity of porous structures is strongly reduced once the mean free path length of the gas inside the structure approaches the pore size (Knudsen effect) [23], measurements were performed both in ambient air and under vacuum.

Sensor Layout
The devices used in this work were originally designed as multipurpose sensors to measure flow, temperature, and conductivity in drinking water [24]. Figure 1a gives a general overview of the sensor design, including all active electrodes and the connecting traces. In this work, only the structure originally designed to work as a calorimetric flow sensor was used. The structure consists of two intertwined thin-film molybdenum (Mo) heaters with electrical connections facilitated by an AlCu0.5 thin film. Depending on the substrate used for processing, these heaters are located either on a thin-film membrane (blue area in Figure 1b) or directly on the substrate.  (b) Detailed view of the heater structure (red) and the membrane area (grey, 890 µm × 550 µm). Only this structure is used in this work.

Sensor Fabrication
All sensors use the same frontside layout ( Figure 1) and are fabricated on 725 µm thick, 8-inch silicon, or Borofloat 33 glass wafers ( Figure 2). The frontside thin-film stack comprised of passivation layers, a heater, and metal traces with bond pads (not shown in Figure 2), is always manufactured using the same mask set and the same materials. In the case of silicon-based sensors, an additional mask is used to define the regions for backside etching.

Sensor Fabrication
All sensors use the same frontside layout ( Figure 1) and are fabricated on 725 µm thick, 8-inch silicon, or Borofloat 33 glass wafers ( Figure 2). The frontside thin-film stack comprised of passivation layers, a heater, and metal traces with bond pads (not shown in Figure 2), is always manufactured using the same mask set and the same materials. In the case of silicon-based sensors, an additional mask is used to define the regions for backside etching. On silicon substrates, the fabrication of the devices starts with the deposition of 5 µm silicon oxide by plasma-enhanced chemical vapor deposition (PECVD), acting as electrical and thermal isolation to the substrate. Then, 150 nm molybdenum (Mo), the material for the heaters, is sputtered. After the 1st lithography, the Mo is patterned by reactive ion etching (RIE) followed by resist removal and surface cleaning (Figure 3a). A quantity of 1 µm of PECVD silicon nitride is then deposited to seal the Mo pattern. After the 2nd lithography, contact holes to the Mo layer are created by RIE ( Figure 3b). Next, sputtering of 1 µm AlCu0.5 is followed by the 3rd lithography and the patterning of the metal by RIE (Figure 3c). Another 0.5 µm of PECVD silicon nitride is then deposited as protection for the AlCu0.5 traces. After the 4th lithography, the bond pads are exposed by RIE. The total thickness of the PECVD-Si3N4 passivation above the Mo heaters is 1.5 µm. The cross-section in Figure 3d depicts the device after completion of all frontside processes. For backside etching, the substrate is turned upside down. After the 5th lithography (backside), the silicon substrate beneath the membrane area is completely removed by deep reactive ion etching (DRIE). Figure 3e shows a corresponding cross-section after resist stripping in O2 plasma. On silicon substrates, the fabrication of the devices starts with the deposition of 5 µm silicon oxide by plasma-enhanced chemical vapor deposition (PECVD), acting as electrical and thermal isolation to the substrate. Then, 150 nm molybdenum (Mo), the material for the heaters, is sputtered. After the 1st lithography, the Mo is patterned by reactive ion etching (RIE) followed by resist removal and surface cleaning (Figure 3a). A quantity of 1 µm of PECVD silicon nitride is then deposited to seal the Mo pattern. After the 2nd lithography, contact holes to the Mo layer are created by RIE ( Figure 3b). Next, sputtering of 1 µm AlCu 0.5 is followed by the 3rd lithography and the patterning of the metal by RIE (Figure 3c). Another 0.5 µm of PECVD silicon nitride is then deposited as protection for the AlCu 0.5 traces. After the 4th lithography, the bond pads are exposed by RIE. The total thickness of the PECVD-Si 3 N 4 passivation above the Mo heaters is 1.5 µm. The cross-section in Figure 3d depicts the device after completion of all frontside processes. For backside etching, the substrate is turned upside down. After the 5th lithography (backside), the silicon substrate beneath the membrane area is completely removed by deep reactive ion etching (DRIE). Figure 3e shows a corresponding cross-section after resist stripping in O 2 plasma.

Sensor Fabrication
All sensors use the same frontside layout ( Figure 1) and are fabricated on 725 µm thick, 8-inch silicon, or Borofloat 33 glass wafers ( Figure 2). The frontside thin-film stack comprised of passivation layers, a heater, and metal traces with bond pads (not shown in Figure 2), is always manufactured using the same mask set and the same materials. In the case of silicon-based sensors, an additional mask is used to define the regions for backside etching. On silicon substrates, the fabrication of the devices starts with the deposition of 5 µm silicon oxide by plasma-enhanced chemical vapor deposition (PECVD), acting as electrical and thermal isolation to the substrate. Then, 150 nm molybdenum (Mo), the material for the heaters, is sputtered. After the 1st lithography, the Mo is patterned by reactive ion etching (RIE) followed by resist removal and surface cleaning (Figure 3a). A quantity of 1 µm of PECVD silicon nitride is then deposited to seal the Mo pattern. After the 2nd lithography, contact holes to the Mo layer are created by RIE ( Figure 3b). Next, sputtering of 1 µm AlCu0.5 is followed by the 3rd lithography and the patterning of the metal by RIE (Figure 3c). Another 0.5 µm of PECVD silicon nitride is then deposited as protection for the AlCu0.5 traces. After the 4th lithography, the bond pads are exposed by RIE. The total thickness of the PECVD-Si3N4 passivation above the Mo heaters is 1.5 µm. The cross-section in Figure 3d depicts the device after completion of all frontside processes. For backside etching, the substrate is turned upside down. After the 5th lithography (backside), the silicon substrate beneath the membrane area is completely removed by deep reactive ion etching (DRIE). Figure 3e shows a corresponding cross-section after resist stripping in O2 plasma.  Sensors on glass (Figure 2b) are processed in the same way as illustrated in Figure 3, but omitting both the first 5 µm PECVD silicon oxide layer and the backside processing.
To obtain test structures in accordance with Figure 2c, the frontside of the substrate is coated with photoresist and laminated with UV tape to protect it during subsequent processing. Next, the wafers are transferred from the cleanroom into the dedicated Pow-derMEMS lab. In this lab, loose, dry powder is filled into the backside cavities and then agglomerated into solid 3D-microstructures by atomic layer deposition (ALD) of 75 nm Al2O3 at 75 °C [16]. Figure 5 shows a cross-section through a sensor after PowderMEMS processing (Figure 2c), UV tape detachment, and photoresist stripping in O2 plasma.

Measurement Setup
After dicing of the finished wafers, individual chips are mounted onto custom printed circuit boards (PCBs) (Figure 6a). The PCBs are designed with a hole located beneath the backside cavity of the chip (Figure 6b). Electrical connections from the chip to the PCB are made by ultrasonic aluminum wire bonding. Finally, a sealing compound is dispensed around the outer perimeter of the chip to ensure a vacuum-tight seal. Sensors on glass ( Figure 2b) are processed in the same way as illustrated in Figure 3, but omitting both the first 5 µm PECVD silicon oxide layer and the backside processing.
To obtain test structures in accordance with Figure 2c, the fro is coated with photoresist and laminated with UV tape to protec processing. Next, the wafers are transferred from the cleanroom in derMEMS lab. In this lab, loose, dry powder is filled into the back agglomerated into solid 3D-microstructures by atomic layer depo Al2O3 at 75 °C [16]. Figure 5 shows a cross-section through a senso processing (Figure 2c), UV tape detachment, and photoresist stripp
To obtain test structures in accordance with Figure 2c, the frontside of the substrate is coated with photoresist and laminated with UV tape to protect it during subsequent processing. Next, the wafers are transferred from the cleanroom into the dedicated Pow-derMEMS lab. In this lab, loose, dry powder is filled into the backside cavities and then agglomerated into solid 3D-microstructures by atomic layer deposition (ALD) of 75 nm Al 2 O 3 at 75 • C [16]. Figure 5 shows a cross-section through a sensor after PowderMEMS processing (Figure 2c), UV tape detachment, and photoresist stripping in O 2 plasma. (e)
To obtain test structures in accordance with Figure 2c, the fro is coated with photoresist and laminated with UV tape to protect processing. Next, the wafers are transferred from the cleanroom in derMEMS lab. In this lab, loose, dry powder is filled into the back agglomerated into solid 3D-microstructures by atomic layer depo Al2O3 at 75 °C [16]. Figure 5 shows a cross-section through a senso processing (Figure 2c), UV tape detachment, and photoresist stripp

Measurement Setup
After dicing of the finished wafers, individual chips are m

Measurement Setup
After dicing of the finished wafers, individual chips are mounted onto custom printed circuit boards (PCBs) (Figure 6a). The PCBs are designed with a hole located beneath the backside cavity of the chip (Figure 6b). Electrical connections from the chip to the PCB are made by ultrasonic aluminum wire bonding. Finally, a sealing compound is dispensed around the outer perimeter of the chip to ensure a vacuum-tight seal.  Electrical measurements are performed by connecting one terminal of the thin-film heater to a controllable voltage source (LabJack U6, LabJack, Lakewood, CO, USA). The second terminal is connected to ground via a series resistor. By measuring the voltage drop across the known series resistor, the heating current is obtained. Using the calculated current and by measuring the voltage drop across the thermistor, the resistance of the thermistor is then derived using Ohm's law. Figure 8 shows a simple 2D thermal model of a heater on a thin-film membrane on top of a porous structure. If the heater is powered with a constant power , it will be at   Electrical measurements are performed by connecting one terminal of the thin-film heater to a controllable voltage source (LabJack U6, LabJack, Lakewood, CO, USA). The second terminal is connected to ground via a series resistor. By measuring the voltage drop across the known series resistor, the heating current is obtained. Using the calculated current and by measuring the voltage drop across the thermistor, the resistance of the thermistor is then derived using Ohm's law. Figure 8 shows a simple 2D thermal model of a heater on a thin-film membrane on top of a porous structure. If the heater is powered with a constant power , it will be at overtemperature above the ambient temperature. is dependent on the thermal conductivities of the gas above the membrane ( ), the porous structure below the membrane ( ), and the membrane itself ( ). Electrical measurements are performed by connecting one terminal of the thin-film heater to a controllable voltage source (LabJack U6, LabJack, Lakewood, CO, USA). The second terminal is connected to ground via a series resistor. By measuring the voltage drop across the known series resistor, the heating current is obtained. Using the calculated current and by measuring the voltage drop across the thermistor, the resistance of the thermistor is then derived using Ohm's law. Figure 8 shows a simple 2D thermal model of a heater on a thin-film membrane on top of a porous structure. If the heater is powered with a constant power P 0 , it will be at overtemperature T above the ambient temperature. T is dependent on the thermal conductivities of the gas above the membrane (λ Gas ), the porous structure below the membrane (λ Por ), and the membrane itself (λ Mem ). overtemperature above the ambient temperature. is dep ductivities of the gas above the membrane ( ), the porou brane ( ), and the membrane itself ( ). The power that is needed to maintain a constant ca The power P 0 that is needed to maintain a constant T can thus be written as the sum

Measurement Principle and Simulation Model
with factors G that are dependent on the individual geometry of the MEMS device [25]. By rearranging Equation (1), an expression for T in terms of the heating power and the thermal conductivities can be found as The thermal resistance R Th of the device, which is defined by the change in T with respect to P 0 , can then be found by taking the partial derivative of Equation (2) with respect to P 0 , yielding Since both products G Gas λ Gas and G Mem λ Mem remain constant, they can be combined into a single constant K, and Equation (3) reduces to By solving Equation (4) for λ Por , the final model that allows for the determination of the thermal conductivity of the porous microstructure from the measured thermal resistance R Th is found to be As the geometry factor G Por and the combined constant K cannot be found analytically for a complex 3D geometry such as the one used in this work, they are determined by the finite element method. For this, models representing the sensor on both a thin-film membrane within a silicon frame and directly on a glass substrate were developed in COMSOL Multiphysics (see Figure 9). All lateral dimensions correspond to the actual devices (see Figure 1). The vertical stack is simplified to aid meshing. To simulate devices manufactured on glass wafers, the silicon substrate and backside cavity are replaced by a glass domain.
In the case of the silicon model, the vertical stack consists of 725 µm monocrystalline silicon (λ Si = 130 W/mK) followed by 5 µm silicon oxide (λ SiO 2 = 1.4 W/mK). On top of this layer, all metals are structured in a single layer of zero thickness. For simplicity, all passivation layers are combined into a single 1.5 µm silicon nitride layer (λ Si 3 N 4 = 3 W/mK) [26,27] on top of the metal layer. The thermal conductivity of the volume of the cavity under the membrane can be varied according to the value of λ Por . For the glass model, the silicon oxide membrane layer is omitted, and the metal layer sits directly on top of the 725 µm thick substrate (λ B f 33 = 1.1 W/mK) [28]. The passivation layer is the same as that of the silicon model. Boundary conditions are chosen corresponding to the experimental conditions. For the top surface, a COMSOL-provided model for conductive/convective heat flux from a horizontal plate into ambient air (296.15 K) is used. All other outer boundaries are set to be at a constant ambient temperature of 296.15 K. The heat source is realized as a boundary heat source corresponding to the geometry of one of the Mo heaters (Figure 9b). The input parameters of the model are thus the heating power P 0 , which is dissipated from one of the Mo heater boundaries, and, in the case of the silicon sensor, the thermal conductivity λ Por of the porous domain inside the backside cavity. The output parameter of the model is the temperature T of the heater, which is measured as the average temperature of the heated Mo heater boundary.
Since both products and remain constant, they can be combined into a single constant , and Equation (3) reduces to By solving Equation (4) for , the final model that allows for the determination of the thermal conductivity of the porous microstructure from the measured thermal resistance is found to be = 1 − As the geometry factor and the combined constant cannot be found analytically for a complex 3D geometry such as the one used in this work, they are determined by the finite element method. For this, models representing the sensor on both a thin-film membrane within a silicon frame and directly on a glass substrate were developed in COMSOL Multiphysics (see Figure 9). All lateral dimensions correspond to the actual devices (see Figure 1). The vertical stack is simplified to aid meshing. To simulate devices manufactured on glass wafers, the silicon substrate and backside cavity are replaced by a glass domain.

Measurement of the TCR
For the determination of the temperature coefficient of resistance (TCR) of the Mo heater structures, wafer-level measurements were carried out. The wafers were placed on a heated chuck and the electrical resistance of the heaters was recorded during a temperature sweep from 30 to 90 • C in steps of 20 • C. The average TCR of the Mo thin film in this temperature range was found to be TCR Mo = 2.38·10 −3 K −1 , which is lower than that of the bulk material [29]. Figure 10 shows micrographs of the sensors with PowderMEMS microstructures inside the backside cavity. The structures are readily visible through the optically transparent membrane stack. The optically invisible ALD layer envelops and connects each particle to its neighbors, forming a solid porous structure. The ALD layer also connects the particles to the inside walls of the backside cavity, and to the underside of the membrane, leading to mechanical stabilization of the membrane.  (Figure 9b). The input parameters of the model are thus the heating power , which is dissipated from one of the Mo heater boundaries, and, in the case of the silicon sensor, the thermal conductivity of the porous domain inside the backside cavity. The output parameter of the model is the temperature of the heater, which is measured as the average temperature of the heated Mo heater boundary.

Measurement of the TCR
For the determination of the temperature coefficient of resistance (TCR) of the Mo heater structures, wafer-level measurements were carried out. The wafers were placed on a heated chuck and the electrical resistance of the heaters was recorded during a temperature sweep from 30 to 90 °C in steps of 20 °C. The average TCR of the Mo thin film in this temperature range was found to be = 2.38 • 10 K , which is lower than that of the bulk material [29]. Figure 10 shows micrographs of the sensors with PowderMEMS microstructures inside the backside cavity. The structures are readily visible through the optically transparent membrane stack. The optically invisible ALD layer envelops and connects each particle to its neighbors, forming a solid porous structure. The ALD layer also connects the particles to the inside walls of the backside cavity, and to the underside of the membrane, leading to mechanical stabilization of the membrane.

Thermal Conductivity of the PowderMEMS Microstructure
As described previously, the basic strategy to obtain the thermal conductivity of the porous 3D microstructures is to measure the thermal resistance of the sensor by applying a voltage sweep to one of the Mo heaters and then using the model presented in Equation (5) to calculate . The first step is to determine the model constants and by 3D FEM simulation of the sensor geometry

Thermal Conductivity of the PowderMEMS Microstructure
As described previously, the basic strategy to obtain the thermal conductivity λ Por of the porous 3D microstructures is to measure the thermal resistance R Th of the sensor by applying a voltage sweep to one of the Mo heaters and then using the model presented in Equation (5) to calculate λ Por . The first step is to determine the model constants K and G Por by 3D FEM simulation of the sensor geometry.

Quality of FEM Simulation and Fitting of Thermal Model
To evaluate the quality of the FEM model, measurements of R Th were taken of unmodified (i.e., empty backside cavity) membrane sensors and sensors processed on a glass substrate in ambient air because, for these cases, the thermal conductivities of the media beneath the sensors are known. The measured values were compared with values obtained by FEM simulation. The results are presented in Table 1 and show that the simulated values closely match the measurements. To obtain values for the model constants K and G Por by FEM simulation, a sweep of λ Por was carried out and the resulting values for R Th were calculated and normalized with respect to the value obtained for ambient air. The thermal model presented in Equation (5) was then fitted to the resulting data points, yielding values for K = 0.83 m and G Por = 6.66 m. Both the simulated data points and the resulting fitted curve are presented in Figure 11.  Table 1 and show that the simulated values closely match the measurements. To obtain values for the model constants and by FEM simulation, a sweep of was carried out and the resulting values for were calculated and normalized with respect to the value obtained for ambient air. The thermal model presented in Equation (5) was then fitted to the resulting data points, yielding values for = 0.83 m and = 6.66 m. Both the simulated data points and the resulting fitted curve are presented in Figure 11. Using the obtained values, the thermal model presented in Equation (5) can then be written as λ Por (R Th,norm ) = 1 − 0.83R Th,norm 6.66R Th,norm

Estimation of Thermal Conductivity
The thermal resistance R Th was then measured for sensors modified with porous PowderMEMS microstructures. Reference measurements were taken of sensors without PowderMEMS modification and of sensors manufactured on Borofloat 33 glass ( Figure 12). To estimate the thermal conductivity using the thermal model presented in Equation (6), the measurement results were normalized with respect to the measurement result obtained for a sensor on a thin-film membrane in ambient air.
Micromachines 2022, 13, 1178 9 of 13 In the case of the devices with AP 300/30 microstructures, the sensors were first meas ured under ambient conditions (AP 300/30) and then again on the custom-made vacuum chuck (AP 300/30 Vac). The thermal conductivities at both ambient and reduced pressure were then estimated using the previously derived thermal model (Equation (6)), and are presented in Table 2.

Discussion
The above results indicate that PowderMEMS microstructures are well suited to tai loring the heat propagation within miniaturized systems, for example, MEMS devices. For porous 3D-microstructures fabricated from silicon nitride and glassy carbon powder thermal conductivity values such as those of Borofloat 33 substrates are achieved. The thermal conductivity measured for porous AP 300/30 microstructures is lower than any previously reported for inorganic materials that are compatible with MEMS processing In comparison with glass and porous silicon, the two most widely used MEMS substrates for solid thermal isolation purposes, AP 300/30 microstructures provide a reduction in In the case of the devices with AP 300/30 microstructures, the sensors were first measured under ambient conditions (AP 300/30) and then again on the custom-made vacuum chuck (AP 300/30 Vac). The thermal conductivities at both ambient and reduced pressure were then estimated using the previously derived thermal model (Equation (6)), and are presented in Table 2.

Discussion
The above results indicate that PowderMEMS microstructures are well suited to tailoring the heat propagation within miniaturized systems, for example, MEMS devices. For porous 3D-microstructures fabricated from silicon nitride and glassy carbon powder, thermal conductivity values such as those of Borofloat 33 substrates are achieved. The thermal conductivity measured for porous AP 300/30 microstructures is lower than any previously reported for inorganic materials that are compatible with MEMS processing. In comparison with glass and porous silicon, the two most widely used MEMS substrates for solid thermal isolation purposes, AP 300/30 microstructures provide a reduction in thermal conductivity by up to two orders of magnitude. By decreasing the gas pressure inside the Powder-MEMS microstructure, thermal conductivities close to that of air (λ Air = 0.026 W/mK) can be achieved.
PowderMEMS microstructures can be used in thermal MEMS such as IR detectors, gas sensors, or calorimetric flow sensors for the purpose of thermal isolation. Figure 13 illustrates the modification of two common types of MEMS-based calorimetric flow sensors with porous 3D microstructures. In both cases, the presence of a mechanically solid body would improve the resilience of the free-standing structures against overpressure events, in addition to suppressing vibrational eigenmodes that may result in aberrant sensor readings or outright mechanical failure. Additionally, in the case of membrane-based sensors (Figure 13a), parasitic effects within the back side cavity, caused by the convection of the monitored medium, would be suppressed. The proposed devices in Figure 13 represent two basic options to integrate PowderMEMS microstructures into MEMS. In Figure 13a, the porous 3D microstructure is manufactured at the very end of the MEMS process. To achieve a stable vacuum inside the porous microstructure, films having a thickness of several micrometers can be deposited by standard MEMS chemical and physical vapor deposition processes. It has already been shown that, for example, silicon oxide can be deposited pinhole-free by PECVD on top of a porous 3D microstructure [19,21]. However, the (long-term) hermeticity of such sealings remains to be investigated. A second approach is presented in Figure 13b. Here, the porous microstructure is first manufactured inside an etched microcavity and then sealed and planarized. First attempts at the planarization of such structures have been reported in [30]. sensors with porous 3D microstructures. In both cases, the presence of a mechanically solid body would improve the resilience of the free-standing structures against overpressure events, in addition to suppressing vibrational eigenmodes that may result in aberrant sensor readings or outright mechanical failure. Additionally, in the case of membranebased sensors (Figure 13a), parasitic effects within the back side cavity, caused by the convection of the monitored medium, would be suppressed. The proposed devices in Figure  13 represent two basic options to integrate PowderMEMS microstructures into MEMS. In Figure 13a, the porous 3D microstructure is manufactured at the very end of the MEMS process. To achieve a stable vacuum inside the porous microstructure, films having a thickness of several micrometers can be deposited by standard MEMS chemical and physical vapor deposition processes. It has already been shown that, for example, silicon oxide can be deposited pinhole-free by PECVD on top of a porous 3D microstructure [19,21]. However, the (long-term) hermeticity of such sealings remains to be investigated. A second approach is presented in Figure 13b. Here, the porous microstructure is first manufactured inside an etched microcavity and then sealed and planarized. First attempts at the planarization of such structures have been reported in [30]. Another field of application for PowderMEMS microstructures may be the creation of thermally isolated areas within a miniaturized system or an integrated circuit to separate "cold parts" and "hot parts". The schematic cross-section in Figure 14a, for example, shows an interposer with chips at very different temperatures, assembled in close proximity. Another field of application for PowderMEMS microstructures may be the creation of thermally isolated areas within a miniaturized system or an integrated circuit to separate "cold parts" and "hot parts". The schematic cross-section in Figure 14a, for example, shows an interposer with chips at very different temperatures, assembled in close proximity. design is shown (existing device), and on the right side a corresponding approach based on a va uum-sealed 3D microstructure (proposed device) is presented.
Another field of application for PowderMEMS microstructures may be the creatio of thermally isolated areas within a miniaturized system or an integrated circuit to sep rate "cold parts" and "hot parts". The schematic cross-section in Figure 14a, for exampl shows an interposer with chips at very different temperatures, assembled in close pro imity. The porous 3D microstructure beneath chip 2 protects it from the heat generated by chip 1. In Figure 14b, "through silicon" porous 3D-microstructures are used to create thermally isolated islands within a larger integrated circuit.
Additionally, it should be noted that, if non-conductive powders are chosen, Powder-MEMS structures also provide galvanic isolation. To connect thermally separated parts of an integrated circuit as shown in Figure 14b electrically, thin-film metal traces can be routed across PowderMEMS structures [16].

Conclusions
This work describes a novel process for microscale thermal isolation by solid porous 3D microstructures. A process for the modification of existing thermal MEMS with thin-film membranes is presented. A model for the estimation of the resulting thermal conductivity of the porous microstructure was developed, and porous 3D microstructures made from three different powdered materials were created and investigated regarding their suitability for thermal isolation. Microstructures agglomerated from Aeroperl 300/30 were found to perform best. By lowering the residual gas pressure inside the structure, a further decrease in thermal conductivity was observed. The final thermal conductivities observed were close to 0.1 W/mK in ambient air and close to 0.04 W/mK for porous structures under vacuum. Table 3 summarizes the patents related to this work. Table 3. Patents related to this work.

No.
Granted Patents Short Description of the Patent Family